This course introduces basic concepts, issues, and processes of electronic system designs that integrate both hardware and software by following a systematic hardware/software co-design and co-verification principle. It covers system modeling at different levels of abstraction, hardware/software partition and co-verification, high-level synthesis, hardware architectures, etc.
Syllabus can be found here.
Subjects | Slides | Reading |
---|---|---|
Course Overview and Introduction Overview on HW/SW Co-Design |
PPT PPT |
Embedded book: section 1.1 - 1.5, Chapter 2 CoDesign book: Chapter 1 |
Data Flow Modeling | CoDesign book: Section 2.1 - 2.3 | |
Data Flow Software Implementation | CoDesign book: Section 3.1 | |
Data Flow hardware and hybrid Implementation | CoDesign book: Section 3.2 - 3.3 (Skip the GEZEL code) | |
Analysis of Control Flow and Data Flow | CoDesign book: Chapter 4 | |
SystemC Introduction |
SystemC-1: Chapter 1 & 2 SystemC-2: Chapter 1 SystemC Quick Reference Card Hardware/Software Co-Verificatioin SystemC Examples |
|
SystemC RTL Modeling |
SystemC-1: Chapter 4 (Skip 4.3, 4.4.6 - 4.4.7) |
|
SystemC Transaction-Level Modeling |
SystemC-1: Chapter 5, section 8.1 - 8.2 |
|
Refinement |
SystemC-1: Section 9.1 - 9.3 A code example of channel refinement refinement.cpp |
|
Principles of HW/SW Interface | CoDesign book: Chapter 9 | |
On-Chip Buses | CoDesign book: Chapter 10 (skip 10.2.2) | |
Sw & HW Interfaces |
CoDesign book: Section 11.1 - 11.2 (skip 11.1.6, 11.2.2.) 12.1 - 11.3 (skip 12.3.2.) Skim 12.4 |
|
High-Level Synthesis | An Introduction to High-Level Synthesis | |
Introduction to Zynq: an All Programmable SoC | PPT | The Zynq Book |